1. fetch cycle
   1. The first byte of an instruction is the opcode. An instruction may be more than one byte long. the other bytes are data or operand address.
   2. the program counter keeps the address of the next instruction to executed.
   3. in the beginning of the fetch cycle where opcode is available is send to the memory.
   4. the memory place the opcode on the data bus , so as to transfer it to CPU.
   5. the entire operation of fetching an opcode takes three clock cycles.. A slow memory make take more time
   6. the clock cycle for which the CPU waits is called wait cycle. most the CPU have been designed to introduced wait cycle to cope with slow memories.
2. Execute Cycle
   1. The opcode fetched from the memory goes to the data register (Dr) and the the Instruction register ( Ir)
   2. from the instruction register it goes to the decoder circuitry which decodes the instruction. the decodor circuitry is within the micro processsor.
   3. Soon after the instruction is decoded execution begins. If the operand is in the general purpose register execution is immediately performed.
   4. the time taken in decoding and execution is one clock cycle.
   5. Suppose if the data or operand are still in the memory. The CPU has to perform some read operation to get the desired data.
   6. after receving the data it perform execution. the read cycle is similar to the fetch cycle
   7. In case of a read cycle , the quantity received are in the form of data or operand instead of an opcode.
   8. In some operation write cycle is performed. In the write cycle date is sent from the CPU to memory.
   9. Thus we see that an execute cycle consist of an read or write cycle
3. Instruction Cycle
   1. An instruction is a command given to the computer to perform a specified operation on a given data
   2. The CPU fetches the instruction stored at memory and executes it one by one. To produce the final result.
   3. the necessary steps that an CPU takes to fetch data and instruction from the memory and executes constitute an instruction cycle.
   4. We come to the point that the instruction cycle consist of a fetch and execute cycle.
   5. in the fetch cycle the CPU fetches an opcode from the memory and the steps to fetch an opcode constitute a fetch cycle.
   6. the necessary steps which are carried out to get data from the memory and perform the operation specified in the instruction constitute an execute cycle.
4. Machine Cycle
   1. the necessary steps carried out to perform fetch, a read or write operation constitute a machine cycle.
   2. An instruction consist of several machine cycle
   3. The opcode of an instruction is fetched in the first machine cycle of an instruction cycle
   4. Most of the single byte instruction requires only one machine cycle to fetch the opcode and execute the instruction
   5. Two byte and three byte instruction require more than one machine cycle.
   6. additional m/c cycle are required to read or write data into memory or I/o devices.
5. Memory mapped I/O
   1. In memory mapped i/o there is only one address space.
   2. Address space is defined as the set of all addresses that a micro processor can generate.
   3. some address is assingned to the memories while some to i/o devices.
   4. I/O devices is also termed as the memory location and one address is assigned to it
   5. The address for I/O devices are different from the address which have been assigned to memories.
   6. the memory address which have not been assigned to memories can be assigned to I/O device.
   7. For eg 2500, 2501, 2502,
   8. In this scheme all the data transfer instruction of the microprocessor can be used for memory as well as I/O devices
6. I/O mapped I/O scheme
   1. in this scheme the address assiged to the memory location can also be assigned to the I/O devices.
   2. In other word same address may be assigned
   3. the microprocessor must issue a signal to distinguish whether the address on the address bus for memory or an I/o device.
   4. the intel 8085 issues an IO/m signal for this purpose
   5. When the signal is high on the address bus , it is for I/O devices.
   6. When the address is low then it is for memory location
   7. IN and OUT instruction are used for I?O devices
   8. IN instruction is used to read the data of an input device while the OUT instruction is used to send data to output devices
7. The interupt of 8085
   1. The Intel 8085 has five interupts namely TRAP,RST 7.5, RST 6.5, RST 5.5 and INTR.
   2. the TRAP has the highest priority while the INTR has the lowest.
   3. When interprets are used they are enabled by the software using the instruction EI (enable interupt) in the main program
   4. The instruction EI enables all the interupts while the instruction DI is used to disable interupts
   5. In certain situation it may be desired to prevent the occurence of interupts while a particular task is being performed by the microprocessor. This can be done with the help of DI instruction.
   6. The DI instruction resets the interupt enable flipflop and disable all the interupts except non-maskable interupt TRAP.
   7. When the interupt goes high the processor complets it current instruction and saves the program counter on stack.
   8. It also resets the interupt enable flip flop before taking up ISS so that the occurence of further interupts is prevented before execution of ISS.