1. Logic Signals and Gates
digital logic
logic values
binary digit
LOW
HIGH
positive logic
negative logic
buffer amplifier
regenerate weak signals
combinational circuit
outputs depend only on current inputs
truth table
F
0
0
0
0
1
0
0
1
0
0
1
0
0
0
1
1
0
1
0
0
0
1
0
1
1
1
1
0
1
1
1
1
sequential circuit
memory
dependance
current inputs
sequence of past inputs
state table
gates
AND
OR
NOT
inverter
NAND
NOR
symbols
inversion bubble
AND
OR
NOT
timing diagram
graph
2. Logic Families
Bell Laboratories
1930s
relays
semiconductor diode
bipolar junction transistor
integrated circuit
1960s
logic family
1960s
collection of different chips
similar
input
output
internal characteristics
TTL
transistor-transistor logic
1960s
CMOS
replace TTL in 1990s
created 10 years before TTL
MOSFET
metal-oxide semiconductor field effect transistor
vastly used nowadays
sigla
complementary
NMOS
PMOS
metal-oxide-semiconductor
3. CMOS Logic
1. Logic Levels
power supply
5V
logic 0
0 - 1.5V
logic 1
3.5 - 5.0V
2. Transistors
modelling
3 terminal device
voltage controlled resistance
very high
off
very low
on
image
NMOS
Vgs
0
Rds
10^6
>0
Rds
low value, 10 Ohms
image
PMOS
Vgs
0
Rds
very high
>0
Rds
very low
image
gate
very high impedance
separated from source and the drain
voltage creates electric field
enhances
retards
current flow between source and drain
field effect
leakage current
3. Inverter Circuit
CMOS logic
NMOS
PMOS
switch
4. NAND and NOR Gates
NAND
CMOS
symbol
NOR
CMOS
Subtopic 2
5. Fan-In
number of inputs a gate can have
4 for NOR gates
6 for NAND gates
6. Noninverting gates
buffer
CMOS
symbol
AND
NAND + inverter
OR
NOR + inverter
7. AND-OR-INVERT and OR-AND-INVERT
AOI
(AB+CD)'
OAI
((A+B)(C+D))'
4. Eletrical Behaviour of CMOS Circuits
engineering design margin
insurance that the circuit will work properly even under the worst of conditions
1. Overview
Logic Voltage Levels
DC noise margins
Fanout
numbers of inputs
connected to
a given output
Speed
Power consumption
Noise
Cosmic rays
Magnetic fields
Power-supply disturbances
Switching action of the logic circuits
Electrostatic discharge
Open-drain outputs
no p-channel pull-up
Three-state outputs
output enable
multisource bus
2. Data Sheets and Specifications
prefixes
74 commercial
54 military
5. CMOS Steday-State Electrical Behaviour
1. Logic Level and Noise Margins
V_OHmin
V_IHmin
V_ILmax
V_OLmax